Avaya Media Processing Server Series System (Software Release 2.1) Instrukcja Użytkownika Pobierz pdf (Strona 120)

Avaya Media Processing Server Series System Reference Manual

Page 120 # P0602477 Ver: 3.1.11

The comments contained in the synclist section provide some recommendations and

guidelines for configuring the synclist. The following is an expanded explanation.

The first uncommented line in this section contains the string [SYNC_LISTS], to

define the section to the startup scripts. Each subsequent (uncommented) line will

define the prioritized list of clocking sources to use. The entries are in tabular format

and the required fields on each line are:

• The string REF_SRC

• The reference source being defined (i.e. A or B)

• The chassis number

• The backplane slot (BPS)

• The TMS slot number (or DCC), card, and device number delimited by colons

(:).

For example, in the preceding sample, the first uncommented line after the

[SYNC_LISTS] line is

REF_SRC A 1 1 4:0:1 4:0:3-8 4:0:2

This configuration states that the first timing source to be used for REFCLK_A

resides on chassis 1, BPS 1, slot 4, card 0, device 1. The slot is the slot number as

labeled on the front of the TMS. The card number is always 0 (additional numbers are

reserved for future enhancement). The device number is the span on the DCC. A

range of devices, or spans, can also be specified as shown in the second field

(4:0:3-8).

If the current clock source becomes disabled for any reason, the selection process

starts at the beginning of the list to obtain a valid source, rather than proceeding to the

next specified source in the list. For example, if the source of REFCLK_A is

currently span 8 on DCC4, the clock selection process starts checking at DCC4, span

1 (first on the list) and runs through the list, instead of going directly to DCC4 span 2

(last on the list).

Although there are no absolute limitations or rules to building the synclist, there are

recommendations for achieving the best degree of failure redundancy.

• In a multiple chassis system, the sources of REFCLK_A and REFCLK_B

should be obtained from different chassis.

• In a single chassis system, the sources of REFCLK_A and REFCLK_B

should be obtained from different BPSs (TMSs).

•A separate REF_SRC line should be used to define the list of sources from

each chassis BPS.

• All available clock sources should be listed.

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Avaya Media Processing Server Series System (Software Release 2.1) Instrukcja Użytkownika Strona 120